Uvm jobs at Cadence Design Systems
Explore 39 current openings. Compare roles, companies, locations, and work options, then open any job to view the full details.
Current openings
Showing 20 jobsSoftware Engineer II - Verification using SV/UVM
Cadence Design SystemsCadence seeks a Software Engineer II to develop verification environments using SV/UVM in Ahmedabad. The role focuses on designing, developing, and verifying VIPs, debugging, and collaborating with cross‑functional …
Ahmedabad, IndiaOn-siteFull-timeActiveDesign Engineer II
Cadence Design SystemsCadence seeks a Design Engineer II to contribute to CPU architecture and verification. The role requires 2‑3 years of experience, hands‑on CPU verification, ASM coding, and familiarity with SystemVerilog, UVM, and SVA …
Pune, IndiaOn-siteFull-timeActivePrincipal Software Engineer (Verification of VIP using Verilog/SV/UVM)
Cadence Design SystemsCadence Design Systems seeks a Principal Software Engineer to lead verification of VIP components using Verilog, SystemVerilog, and UVM in Ahmedabad. The role involves managing multiple VIPs, leading a small team, and …
Ahmedabad, IndiaOn-siteFull-timeActiveDesign Engineering Architect
Cadence Design SystemsCadence IP Group designs and verifies high‑performance interface IPs. The Design Engineering Architect leads verification strategy, builds UVM testbenches, and may conduct formal verification and emulation qualification …
Bangalore,India,IndiaOn-siteFull-timeActiveSenior Principal Design Engineer
Cadence Design SystemsCadence seeks a Senior Principal Design Engineer to lead verification of PCIe Design IP across multiple generations. The role requires deep expertise in SystemVerilog and UVM, functional verification of PCIe, and strong …
Bangalore, IndiaOn-siteFull-timeActivePrincipal Design Engineer
Cadence Design SystemsCadence seeks a Principal Design Engineer with deep expertise in design verification, SV/UVM, and functional verification fundamentals. Must hold BE/BTech/ME/MTech in Electrical/Electronics/VLSI and 8+ years experience. …
Bangalore, IndiaOn-siteFull-timeActiveLead Design Engineer
Cadence Design SystemsLead design engineer role at Cadence Design Systems in Bangalore. Requires strong expertise in Verilog, HVL (SV, Specman e) with UVM/OVM/eRM methodology, assertions development/closure, constraint randomization, …
BANGALORE, IndiaOn-siteFull-timeActiveLead Solutions Engineer
Cadence Design SystemsLead Solutions Engineer at Cadence Design Systems will design and implement verification strategies for SOCs. Responsibilities include reviewing design specifications, creating test plans, developing constrained random …
NOIDA, IndiaOn-siteFull-timeActivePrincipal Software Engineer
Cadence Design SystemsCadence Design Systems’ Verification team in Ahmedabad builds and leads VIPs using C/C++ and SV/UVM to ensure robust hardware designs. The Principal Software Engineer drives VIP design, mentors a small team, and …
Ahmedabad,IndiaFull-timeActiveSenior Principal Design Engineer
Cadence Design SystemsDesign Verification Team at Cadence focuses on ensuring the correctness of interconnect IP and Tensilica processor subsystems. The Senior Principal Design Engineer crafts verification plans, builds UVM‑based …
Noida,IN,IndiaOn-siteFull-timeActivePrincipal Design Engineer
Cadence Design SystemsCadence’s DDR Subsystem Verification team builds and verifies high‑performance memory IP for global customers. The Principal Design Engineer leads functional verification of DDR, LPDDR, and HBM controllers, develops UVM …
Bangalore,IndiaOn-siteFull-timeActivePrincipal Education Application Engineer
Cadence Design SystemsCadence’s Education & Training team builds high‑impact learning content for verification engineers. The role authorizes and delivers lectures, labs, and demos on UVM, hardware acceleration, and emulation, supporting …
Bangalore,IndiaOn-siteFull-timeActivePrincipal Design Engineer
Cadence Design SystemsCadence Design Systems seeks a Principal Design Engineer to lead design verification efforts for complex VLSI products. The role requires a strong background in functional verification fundamentals, environment …
PUNE, 04, IndiaOn-siteFull-timeActiveLead Design Engineer
Cadence Design SystemsDesign Verification team at Cadence focuses on ensuring correctness of interconnect IP and Tensilica processor subsystems. The Lead Design Engineer crafts verification plans, builds UVM‑based environments, and drives …
Noida,IN,IndiaOn-siteFull-timeActiveSr Principal Design Engineer
Cadence Design SystemsCadence Design Systems is seeking a Sr Principal Design Engineer to lead verification efforts for advanced IP development. The role focuses on architecting robust UVM-based verification environments, driving methodology …
BANGALORE, IndiaOn-siteFull-timeActiveSoftware Engineer II
Cadence Design SystemsCadence seeks a Software Engineer II in Noida to design and develop VIP components. Requires 2‑5 years experience, proficiency in SV/UVM, debugging, C/C++/Scripting, and layered protocols (Ethernet, USB, PCIe, CXL). …
Noida, IndiaOn-siteFull-timeActiveLead Verification Engineer
Cadence Design SystemsLead Verification Engineer at Cadence Design Systems drives AI-driven pre-silicon verification. Leveraging formal verification, UVM, and machine learning, the role architects next‑generation verification methodologies. …
NOIDA, IndiaOn-siteFull-timeActiveLead Product Validation Engineer
Cadence Design SystemsLead Product Validation Engineer at Cadence Design Systems. Drives verification of complex digital systems, designing and implementing functional verification environments using HDLs (Verilog/VHDL), SystemVerilog, C++, …
Noida, IndiaOn-siteFull-timeActiveSr Principal Design Engineer
Cadence Design SystemsAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. …
Bangalore, IndiaOn-siteFull-timeActiveSr Principal Verification Engineer
Cadence Design SystemsSenior Verification Engineer with 12-15+ years in pre-silicon ASIC verification, specializing in formal and UVM methodologies. Expert in debugging verification failures using waveform viewers and simulation tools, and …
NOIDA, IndiaOn-siteFull-timeActive