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Verification jobs at Cadence Design Systems

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Showing 20 jobs

  1. Sr Principal Verification Engineer

    Cadence Design Systems

    Cadence seeks a Sr Principal Verification Engineer to lead pre‑silicon verification using AI. The role blends formal verification, UVM, and ML to accelerate design validation. Candidates will architect AI‑enhanced …

    NOIDA, IndiaOn-siteFull-time
    Active

  2. Lead Verification Engineer

    Cadence Design Systems

    Lead Verification Engineer at Cadence Design Systems drives AI-driven pre-silicon verification. Leveraging formal verification, UVM, and machine learning, the role architects next‑generation verification methodologies. …

    NOIDA, IndiaOn-siteFull-time
    Active

  3. Principal Verification Engineer

    Cadence Design Systems

    Cadence seeks a Principal Verification Engineer to lead validation of Palladium emulation technologies, including UPF. The role involves verifying new features, managing regression suites, reviewing functional …

    Noida, IndiaOn-siteFull-time
    Active

  4. Lead Product Engineer

    Cadence Design Systems

    Cadence Design Systems seeks a Lead Product Engineer to drive development of UCIe verification IP. The role requires deep expertise in UCIe domain, SystemVerilog, and UVM methodology, and a proven track record of …

    Noida, IndiaOn-siteFull-time
    Active

  5. Principal Design Engineer

    Cadence Design Systems

    Cadence seeks a Principal Design Engineer with deep expertise in design verification, SV/UVM, and functional verification fundamentals. Must hold BE/BTech/ME/MTech in Electrical/Electronics/VLSI and 8+ years experience. …

    Noida, IndiaOn-siteFull-time
    Active

  6. Lead Design Engineer

    Cadence Design Systems

    At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. …

    BANGALORE, IndiaOn-siteFull-time
    Active

  7. Lead Software Engineer

    Cadence Design Systems

    Cadence seeks a Lead Software Engineer in Ahmedabad to design and develop verification IP (VIP) using C/C++. The role requires strong expertise in SystemVerilog/UVM verification, digital electronics fundamentals, and …

    Ahmedabad, IndiaOn-siteFull-time
    Active

  8. Lead Verification Engineer

    Cadence Design Systems

    Cadence Design Systems seeks a Lead Verification Engineer to pioneer AI-driven pre‑silicon verification. The role blends formal and UVM verification expertise with machine‑learning techniques, leveraging LLMs and …

    Bangalore, IndiaOn-siteFull-time
    Active

  9. Sr Principal Verification Engineer

    Cadence Design Systems

    Senior Verification Engineer with 12-15+ years in pre-silicon ASIC verification, specializing in formal and UVM methodologies. Expert in debugging verification failures using waveform viewers and simulation tools, and …

    NOIDA, IndiaOn-siteFull-time
    Active

  10. Lead Software Engineer

    Cadence Design Systems

    Cadence’s Verification team builds SW‑driven verification solutions that enable customers to validate complex SoC designs. The Lead Software Engineer develops and supports verification libraries, translates customer …

    Bangalore,IndiaOn-siteFull-time
    Active

  11. Design Engineering Architect

    Cadence Design Systems

    At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Description: Design Verification Leadership for IP development team. B. Tech/M.Tech with 14+ years …

    BANGALORE, IndiaOn-siteFull-time
    Active

  12. Principal Education Application Engineer

    Cadence Design Systems

    Cadence’s Education & Training team builds high‑impact learning content for verification engineers. The role authorizes and delivers lectures, labs, and demos on UVM, hardware acceleration, and emulation, supporting …

    Bangalore,IndiaOn-siteFull-time
    Active

  13. Principal Design Engineer

    Cadence Design Systems

    Principal Design Engineer at Cadence Design Systems responsible for design verification of interconnect IP, leading verification plans, coverage collection, and collaboration with DV/Arch/Design/FW teams. Requires 8+ …

    Bangalore, IndiaOn-siteFull-time
    Active

  14. Sr Principal Design Engineer

    Cadence Design Systems

    Cadence Design Systems is seeking a Sr Principal Design Engineer to lead verification efforts for advanced IP development. The role focuses on architecting robust UVM-based verification environments, driving methodology …

    BANGALORE, IndiaOn-siteFull-time
    Active

  15. Sr Principal Design Engineer

    Cadence Design Systems

    Lead DV execution of UCIe PHY IP, drive DV team meetings, collaborate with RTL, AMS, PD teams, lead technical alignment on verification strategies, architect environments, drive execution efficiency and quality …

    Bangalore, IndiaOn-siteFull-time
    Active

  16. Senior Principal Design Engineer

    Cadence Design Systems

    Cadence seeks a Senior Principal Design Engineer to lead verification of PCIe Design IP across multiple generations. The role requires deep expertise in SystemVerilog and UVM, functional verification of PCIe, and strong …

    Bangalore, IndiaOn-siteFull-time
    Active

  17. Principal Design Engineer

    Cadence Design Systems

    Principal Design Engineer at Cadence leads verification of Serial & Interface IPs: PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C. Develop UVM testbench for robust, scalable verification. Perform …

    Bangalore, IndiaOn-siteFull-time
    Active

  18. Principal Software Engineer

    Cadence Design Systems

    Cadence Design Systems’ Verification team in Ahmedabad builds and leads VIPs using C/C++ and SV/UVM to ensure robust hardware designs. The Principal Software Engineer drives VIP design, mentors a small team, and …

    Ahmedabad,IndiaFull-time
    Active

  19. Lead Design Engineer

    Cadence Design Systems

    Lead Design Engineer with 4+ years in design verification, specializing in SV/UVM, functional verification fundamentals, environment planning, test plan generation, and SystemVerilog coding. Experienced in verifying …

    BANGALORE, IndiaOn-siteFull-time
    Active

  20. Principal Software Engineer (Verification of VIP using Verilog/SV/UVM)

    Cadence Design Systems

    Cadence Design Systems seeks a Principal Software Engineer to lead verification of VIP components using Verilog, SystemVerilog, and UVM in Ahmedabad. The role involves managing multiple VIPs, leading a small team, and …

    Ahmedabad, IndiaOn-siteFull-time
    Active

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