Ddr jobs in Karnataka
Explore 19 current openings. Compare roles, companies, locations, and work options, then open any job to view the full details.
Current openings
Showing 20 jobsSenior DDR & Execution Validation Engineer
GraphcoreMemory Validation team at Graphcore validates DDR and HBM memory subsystems for next‑gen AI compute platforms. The Senior Engineer leads bring‑up, functional, stress and performance validation, develops Python …
Bengaluru, IndiaOn-siteFull-timeActiveDDR & HBM Validation Engineer
GraphcoreMemory Validation team at Graphcore validates advanced memory subsystems for next‑generation AI compute platforms. The engineer executes DDR and HBM bring‑up, validation, characterization and debug, develops Python …
Bengaluru,IndiaOn-siteActiveStaff DDR and HBM Validation Engineer
GraphcoreMemory Validation team at Graphcore ensures robust memory subsystems for next‑generation AI compute platforms. The Staff Validation Engineer leads DDR and HBM bring‑up, validation, characterization and debug, developing …
Bengaluru,Karnataka,IndiaOn-siteFull-timeActiveSr Staff Manager DDR/HBM
Marvell Software Solutions IsraelMarvell Data Centre Engineering (DCE) – Compute & Storage (CCS) BU builds high‑performance ASICs for carrier, cloud, and automotive markets. As Sr Staff Manager DDR/HBM, you mentor engineers, define memory subsystem …
Bangalore,IndiaFull-timeActiveSenior VLSI Design Engineer, High Speed DDR IO
SanDiskVLSI Engineering team at SanDisk designs high‑speed DDR IO solutions for next‑generation memory. The Senior VLSI Design Engineer develops high‑speed IO blocks, performs power‑bus analysis and timing closure, and …
Bangalore,IndiaOn-siteFull-timeActiveDDR Pre
IntelIntel Central Engineering Group (CEG) builds scalable engineering solutions across product enablement, custom ASIC, and foundry enablement. The DDR Pre‑Silicon Verification Architect develops IP verification plans, test …
Bangalore,IndiaHybridFull-timeActiveSenior Hardware Program Manager, DDR Core Subsystem
QualcommEngineering Services Group – Program Management at Qualcomm drives the development and delivery of DDR core subsystem projects. The Senior Hardware Program Manager leads multiple medium‑complexity programs, creating and …
Bangalore,Karnataka,IndiaOn-siteFull-timeActiveSenior Staff Design Verification Engineer, DDR PHY
QualcommHardware Engineering at Qualcomm focuses on designing and verifying cutting-edge silicon components for next‑generation mobile devices. The Senior Staff Design Verification Engineer leads the creation of DV test …
Bangalore,Karnataka,IndiaFull-timeActiveStaff Engineer, VLSI Design Engineering (IO Design, High Speed DDR)
SanDiskVLSI Engineering team at SanDisk designs high‑speed DDR IO solutions for next‑generation memory. The Staff Engineer will create and verify high‑speed IO blocks, perform power‑bus analysis and timing closure, and …
Bangalore, Karnataka, IndiaOn-siteFull-timeActiveSr Principal Design Engineer
Cadence Design SystemsRTL Design Engineer for DDR Memory Controller IP development team. Design and support RTL of DDR Memory Controller solution. Support DDR4/LPDDR4 protocols. Work with existing RTL, add new features, ensure clean …
BANGALORE, IndiaOn-siteFull-timeActivePrincipal Design Engineer
Cadence Design SystemsCadence’s DDR Subsystem Verification team builds and verifies high‑performance memory IP for global customers. The Principal Design Engineer leads functional verification of DDR, LPDDR, and HBM controllers, develops UVM …
Bangalore,IndiaOn-siteFull-timeActiveSr. Staff RTL Design Engineer
Marvell Software Solutions IsraelMarvell Data Centre Engineering (DCE) – Compute & Storage builds high‑performance silicon for carrier, cloud and automotive markets. As a Sr. Staff RTL Design Engineer you own DDR/LPDDR/HBM subsystem micro‑architecture, …
Bangalore,IN,IndiaOn-siteFull-timeActiveStaff Design Verification Engineer
Marvell Software Solutions IsraelMarvell, a leading semiconductor solutions provider, seeks a Staff Design Verification Engineer to develop verification testbenches for DDR/LPDDR/HBM technologies. The role requires deep expertise in System Verilog, …
Bangalore, IndiaOn-siteFull-timeActiveSr Staff Design Verification Engineer
Marvell Software Solutions IsraelMarvell’s semiconductor solutions power the data infrastructure that connects our world across enterprise, cloud, AI, automotive, and carrier architectures. The Sr Staff Design Verification Engineer will lead …
Bangalore, Karnataka, IndiaOn-siteFull-timeActiveLead Design Engineer
Cadence Design SystemsCadence seeks a Lead Design Engineer to create and verify DDR IO analog layouts, mentor a small team, and collaborate with design engineers to deliver high‑quality IP on 28nm and below nodes.
Bangalore, IndiaOn-siteFull-timeActiveLead Design Engineer
Cadence Design SystemsLead Design Engineer with 4+ years in design verification, specializing in SV/UVM, functional verification fundamentals, environment planning, test plan generation, and SystemVerilog coding. Experienced in verifying …
BANGALORE, IndiaOn-siteFull-timeActiveSenior Engineer
Arrow ElectronicsLead verification projects, mentor team, manage client interactions. Guide team on UVM SV test-benches, block/sub-system/SOC test plans. Define PCIe, NVMe, NAND, DDR, CPU subsystem verification flows and metrics.
Bangalore, IndiaOn-siteFull-timeActiveSenior Engineer Level 2
Arrow ElectronicseInfochips Private Limited's engineering team designs and verifies complex system-on-chip components. The Senior Engineer Level 2 leads verification projects, mentors junior staff, and develops UVM-based test benches …
Bangalore,IndiaOn-siteFull-timeActiveLead Design Engineer
Cadence Design SystemsLead Design Engineer at Cadence Memory IP Group. Develops firmware for DDR/LPDDR/GDDR/HBM PHY using microcontrollers, writes C embedded firmware, collaborates with hardware designers and verification teams, and debug …
BANGALORE, IndiaOn-siteFull-timeActiveStaff Design Verification Engineer
1010 Analog Devices Inc.Lead verification of complex accelerators, datapath IP, processor cores, and interfaces (DDR, Ethernet, USB) using UVM and Formal DV. Architect testbenches, define test plans, integrate subsystems, evaluate third‑party …
Bangalore, IndiaOn-siteFull-timeActive