Low‑Power Design jobs in Bengaluru

ASIC Engineer, Implementation, Low-Power Design

Meta Silicon Engineering team builds custom silicon powering Meta's AI and data center workloads. The ASIC Engineer, Implementation focuses on low-power design, developing power modeling flows in Python/C++, driving …

Principal Digital Design Engineering

Analog Devices seeks a Principal Digital Design Engineer to lead low‑power methodology and circuit design in advanced technology nodes. Responsibilities include writing architecture specifications, designing RTL and UPF …

Verification Engineer, Low Power

NVIDIA is seeking a Verification Engineer, Low Power to join its Bengaluru team. The role focuses on structural and functional verification of low‑power features across NVIDIA’s chip family. Responsibilities include …

Product Engineer II, Low Power

Cadence Design Systems' Verification team builds advanced low‑power verification flows for Xcelium. The Product Engineer II creates product requirements, automates tool flows, and collaborates with R&D and customers to …

Low Power Design Engineer Sr Lead

Verification Engineer, Low Power

NVIDIA is a leading technology company known for GPU innovation and AI research. This role focuses on structural and functional verification of low‑power features across NVIDIA’s chip family. Responsibilities include …

Senior Engineer I - Design

Microchip Technology seeks a Senior Engineer I – Design to lead the development of next‑generation low‑power wireless SoCs. The role involves full SOC design from concept to tape‑out, including RTL coding, synthesis, …

Senior Engineer I

Microchip’s DSPIC Business Unit seeks a Physical Design Engineer to drive microcontroller and SOC designs, delivering next‑gen low‑power mixed‑signal solutions. Responsibilities include implementing complex designs with …

ASIC RTL Design Engineer III, Silicon

Platforms and Devices team at Google builds custom silicon that powers direct‑to‑consumer products. As an ASIC RTL Design Engineer III, you design micro‑architecture for mobile SOC subsystems, integrate first‑party and …

Low Power Multimedia Systems Engineer

Multimedia Architecture Power Team at Qualcomm builds embedded imaging solutions for Snapdragon chipsets powering Mobile, Automotive, IoT, and XR devices. The engineer defines power‑efficient system architectures for …

Low-Code/No-Code Developer

Kyndryl seeks a Low‑Code/No‑Code Developer to design, build, and deploy scalable enterprise applications using Unqork, MS Power Platform, Mendix, and Workato. The role involves collaborating with stakeholders, …

Low-Code/No-Code Developer

Kyndryl seeks a Low‑Code/No‑Code Developer to design, build, and deploy enterprise applications using Unqork, Microsoft Power Platform, Mendix, and Workato. The role involves creating secure, user‑friendly solutions, …

Staff Engineer, Low Power Verification & Formal Equivalence

Low Power Verification & Formal Equivalence team at SiFive India drives static low‑power checks and formal equivalence flows for high‑performance SoCs. The Staff Engineer owns UPF coding, automates low‑power signoff, …

Principal Engineer Design

Design Engineering team at Infineon Technologies drives low‑power methodology for ASICs. The role defines UPF flows, creates early power estimation workflows, and partners with power architecture, verification and EDA …

Staff Director, Low Power AI HW Product Management

Operations Group Product Management at Qualcomm drives low-power AI and ambient compute platforms. The role defines and executes product strategy for the Low Power AI subsystem and microNPU, collaborating across …

Power Architecture Engineer

NVIDIA Power Architecture Engineer role in Bengaluru. Join NVIDIA Power Architecture Group to design, analyze, and verify power features across ASICs, silicon, and system-level solutions. Responsibilities include power …

Senior Staff Power Design Engineer

Senior Staff Power Design Engineer at Marvell Software Solutions Israel. Lead ASIC digital design, physical implementation, and low‑power signoff across networking, processor, computing, automotive, connectivity, and …

Lead Hardware Engineer

Lead Hardware Engineer at Cadence Design Systems. Responsible for synthesis, PnR, SOC design, methodology improvement, floor planning, placement, routing, low power synthesis, scripting, verification. Works with RTL, …

Power Platform Developer

Power Platform team at AECOM delivers low-code solutions to streamline client operations. The developer builds Canvas and Model-Driven Power Apps, designs Dataverse databases, creates Power BI visualizations, and …