India jobs / Lvs / Karnataka

Lvs jobs in Karnataka

Explore 11 current openings. Compare roles, companies, locations, and work options, then open any job to view the full details.

Current openings

Showing 20 jobs
  1. Sr Principal Product Validation Engineer

    Cadence Design Systems

    As PV engineer, this person will be responsible for product validation [quality engineering] with following activities: Develop accuracy test cases for DRC/LVS/FILL rules based on foundry decks, TSMC/Samsung…etc. …

    BANGALORE, IndiaOn-siteFull-time
    Active
  2. Senior Engineer, DPG IP DEV Layout

    Micron Technology

    Micron Technology seeks a Senior Engineer, DPG IP DEV Layout in Bengaluru. Responsible for analog, mixed-signal, custom digital block layout design and full-chip integration. Perform LVS/DRC/antenna verification, …

    Bengaluru, IndiaOn-siteFull-time
    Active
  3. STAFF Engineer

    Micron Technology

    Responsible for layout design and verification of analog, mixed‑signal, and custom digital blocks, including LVS, DRC, antenna, and EM checks. Lead on‑time delivery, mentor junior team members, and automate layout tasks …

    Bengaluru,IndiaOn-siteFull-time
    Active
  4. Lead PD Engineer

    NXP Semiconductors

    Digital Physical Design Engineer responsible for RTL synthesis to GDS implementation, floor planning, placement, CTS, routing, STA, DRC/LVS/EMIR verification, power integrity, DFT, automation scripts, and continuous …

    Bangalore, IndiaOn-siteFull-time
    Active
  5. Analog Layout Design Engineer

    Intel

    Analog Layout Design Engineer at Intel’s Central Engineering Group in Bangalore. The role builds custom analog and mixed‑signal layout for SoC IP, executing Virtuoso designs, DRC/LVS verification, and ECO sign‑off under …

    Bangalore,IndiaHybridContract
    Active
  6. R&D Engineer

    Broadcom

    TLR team (top-level-route) at Broadcom focuses on advanced place and route, CTS, and physical verification for chip finishing and tapeout. The R&D Engineer develops and runs routing, congestion analysis, DRC/LVS checks, …

    Bangalore,IndiaOn-siteFull-time
    Active
  7. Lead Physical Design Engineer

    NXP Semiconductors

    Job Summary: Digital Physical Design Engineer responsible for RTL synthesis to GDS implementation, floor planning, placement, CTS, routing, STA, DRC/LVS/EMIR, ECO, verification, optimization, and continuous improvement. …

    Bangalore, IndiaOn-siteFull-time
    Active
  8. Senior Mask Design Engineer

    SanDisk

    Mask Design Engineering team at SanDisk creates and optimizes mask layouts for analog, digital, and mixed-signal ICs. The Senior Mask Design Engineer independently delivers high‑quality layout designs, performs DRC/LVS …

    Bangalore, Karnataka, IndiaOn-siteFull-time
    Active
  9. Staff Engineer, Physical Design Engineering

    1010 Analog Devices Inc.

    Staff Engineer responsible for end-to-end Netlist-to-GDS Physical Design, including Place‑and‑Route, Extraction, STA, Timing/SI/Power/EM/IR analysis, and LVS/DRC verification. Leads automation via Python/Perl/Shell/TCL …

    Bangalore, IndiaOn-siteFull-time
    Active
  10. R&D Engineer

    Broadcom

    TLR team at Broadcom focuses on top-level routing and physical verification for advanced chip designs. The R&D Engineer conducts place-and-route, CTS, congestion analysis, runs DRC/LVS checks, scripts in Perl/TCL, and …

    Bangalore,IndiaOn-siteFull-time
    Active
  11. Software Development Engineer

    1010 Analog Devices Inc.

    Senior CAD engineer develops and tests QA framework for PDK validation, creating layout generators, DRC/LVS rules, and test cases. Designs automatic test coverage, debugs PASS/FAIL, supports design community, …

    Bangalore, IndiaOn-siteFull-time
    Active
  12. Engineer, DEG Layout

    Micron Technology

    Micron Technology’s Layout Engineering team builds critical analog, mixed‑signal, and custom digital block layouts for memory and storage solutions. The Engineer, DEG Layout designs and verifies layouts using LVS, DRC, …

    Bengaluru,IndiaOn-siteFull-time
    Active
  13. RF Layout Design Engineer

    Broadcom

    RF Layout Design Engineer at Broadcom’s 4123 LSI India R&D, responsible for high‑complexity analog and RF layout, LVS/DRC/ESD verification, and full project cycle from floor planning to tape‑out. Works with remote radio …

    Bangalore,IndiaOn-siteFull-time
    Active
  14. Principal Engineer

    Micron Technology

    Micron Technology’s Design Engineering Group (DEG) drives the next generation of memory and storage solutions. The Principal Engineer leads critical analog, mixed‑signal, and custom digital block layout design, ensuring …

    Bengaluru,IndiaOn-siteFull-time
    Active
  15. Silicon Physical Verification Engineer, Google Cloud

    Google

    AI and Infrastructure team at Google Cloud develops custom silicon solutions powering Google’s products. The Silicon Physical Verification Engineer leads DRC, LVS, ERC and DFM verification, defines methodology and …

    Bengaluru, Karnataka, IndiaOn-siteFull-time
    Active
  16. Staff Physical Verification Engineer

    Analog Devices

    Analog Devices’ Physical Verification team builds the final silicon for advanced SoCs, ensuring every design rule, LVS, DRC, and reliability check passes before tape‑out. The Staff Physical Verification Engineer owns …

    Bangalore,IndiaOn-siteFull-time
    Active
  17. Senior Memory Layout Design Engineer

    Broadcom

    Senior Memory Layout Design Engineer responsible for creating high‑quality memory layouts in sub‑micron CMOS processes (16nm‑3nm). Leads layout guideline implementation, floor‑planning, and verification (LVS, DRC, ERC, …

    Bangalore, Karnataka, IndiaOn-siteFull-time
    Active
  18. Engineer, Analog Layout

    Micron Technology

    Micron Technology seeks an Analog Layout Engineer to design and develop critical analog, mixed‑signal, and custom digital layout blocks, perform comprehensive verification (LVS, DRC, Antenna, PEX, Voltus, EMIR), deliver …

    Bengaluru, IndiaOn-siteFull-time
    Active
  19. Principal Physical verification Engineer

    Analog Devices

    Physical Verification Team at Analog Devices drives end‑to‑end signoff for advanced SoC/ASIC designs. The role owns full‑chip and block‑level DRC, LVS, PERC, and reliability checks, leading methodologies and schedules …

    Bangalore,IndiaOn-siteFull-time
    Active
  20. Analog Layout Engineer

    Broadcom

    Analog Layout Engineer with over five years of hands‑on experience in analog and RF layout for advanced semiconductor nodes. Skilled in block‑level and IP‑level design, integrating floorplans for modules such as SerDes, …

    Bangalore, Karnataka, IndiaOn-siteFull-time
    Active