Mixed‑Signal jobs in Bengaluru
Explore 20 current openings. Compare roles, companies, locations, and work options, then open any job to view the full details.
Current openings
Showing 20 jobsMixed Signal CAD Engineer
onsemiCorporate R&D Design Systems Technology department at onsemi develops and integrates advanced design tools for global BU teams. The Senior Mixed Signal CAD Engineer creates and supports analog and mixed‑signal design …
Bangalore, IndiaOn-siteFull-timeActivePrincipal IO Mixed Signal Design Engineer
Microchip TechnologyAs a member of Microchip’s engineering community, the mixed signal design engineer will be responsible for integration and verification of mixed signal blocks in high-speed IO’s in FPGA’s. The successful candidate will …
Bangalore, IndiaOn-siteFull-timeActiveMixed Signal Design Verification Engineer
IntelIntel’s Mixed Signal Design Verification team in Bangalore builds and validates cutting‑edge mixed‑signal IPs such as PCIe, UCIE, and USB4 PHYs. The engineer designs functional verification plans, develops UVM …
Bangalore,IndiaHybridFull-timeActiveMixed Signal Logic Design Engineer
IntelIntel’s Mixed Signal Logic Design team builds cutting‑edge mixed‑signal and high‑speed IP blocks that power next‑generation SoCs. The engineer develops RTL for mixed‑signal subsystems, collaborates with SoC architects …
Bangalore,IndiaHybridFull-timeActiveMixed Signal Design Verification Engineer
IntelMixed Signal Design Verification Engineer on Intel's Mixed Signal Verification team. The team ensures high‑quality mixed‑signal IPs such as PCIe, USB4/Type‑C PHYs meet performance and reliability goals. The role …
Bangalore,India,IndiaHybridFull-timeActiveAnalog Mixed-Signal Verification Engineer
GLOBALFOUNDRIESGlobalFoundries is seeking an Analog Mixed‑Signal Verification Engineer to join its advanced design team in Bangalore. The role focuses on verifying complex analog and mixed‑signal IP blocks using Cadence Virtuoso, …
Bangalore, Karnataka, IndiaOn-siteFull-timeActiveMixed Signal Design Verification Engineer
IntelMixed Signal Design Verification Engineer at Intel responsible for functional verification of digital and mixed signal logic components, ensuring designs meet specifications. Develops IP verification plans, test …
Bangalore, IndiaOn-siteFull-timeActiveSenior Engineer, Mixed Signal Design Verification
Analog DevicesAnalog Devices, a global semiconductor leader, seeks a Senior Engineer for Mixed Signal Design Verification in Bangalore. The role focuses on verifying complex mixed‑signal designs, behavioral modeling of analog blocks, …
Bangalore, IndiaOn-siteFull-timeActiveMixed Signal Design Verification Engineer
IntelCentral Engineering Group (CEG) at Intel designs scalable analog and mixed‑signal IPs for advanced process nodes. The Mixed Signal Design Verification Engineer creates, simulates, and verifies analog circuits, develops …
Bangalore,IndiaHybridContractActiveMS Design Verification Engineer
1010 Analog Devices Inc.Analog Devices seeks a senior Mixed Signal Design Verification Engineer to lead verification of high‑integrity industrial automation products. The role requires 8+ years of analog/mixed‑signal behavioral modeling and …
Bangalore, IndiaOn-siteFull-timeActiveMixed Signal Design Verification Engineer
IntelMixed Signal Verification team at Intel focuses on ensuring functionality and quality of mixed‑signal logic components for next‑generation technologies. The engineer develops and executes verification methodologies, …
Bangalore,IndiaHybridFull-timeActiveMixed Signal Design Verification Engineer
IntelMixed Signal Design Verification Engineer at Intel’s Central Engineering Group (CEG) focuses on validating mixed‑signal logic components that power Intel’s next‑generation products. The role develops verification plans, …
Virtual IndiaRemoteFull-timeActiveMixed Signal IP Verification Engineer
IntelMemory PHY Group (MPG) within Intel’s Central Engineering Group (CEG) seeks a Pre‑Silicon Verification Engineer to build and validate DDR PHY IP for SoCs across Intel’s desktop and laptop lines. The role drives …
Bangalore,IndiaHybridFull-timeActiveIo And Mixed Signal Circuit Design Engineer
BroadcomMixed Signal and IO Library Development team in Central Engineering designs and verifies IO interfaces and mixed‑signal blocks for Broadcom. The engineer codes RTL, creates digital wrappers, collaborates with layout and …
Bangalore, Karnataka, IndiaOn-siteFull-timeActiveDigital Mixed Signal Design Verification Engineer
Analog DevicesAnalog Devices' Design Verification team builds verification strategies for highly integrated mixed‑signal products. The engineer creates analog/mixed‑signal models, develops SV/UVM verification environments, and …
Bangalore,IN,IndiaOn-siteFull-timeActiveMixed Signal Logic Design Engineer
IntelMemory PHY Group (MPG) in Intel's Central Engineering Group builds high‑speed, low‑power DDR PHY IPs for next‑gen silicon. The Mixed Signal Logic Design Engineer defines architecture, writes SystemVerilog RTL, and …
Bangalore,India,IndiaHybridFull-timeActiveSenior Engineer, Mixed Signal Design Engineering
1010 Analog Devices Inc.Senior mixed signal design engineer in Engineering Enablement org, Bangalore. Develops and maintains CAD tools/methods for Analog, RF, Mixed‑Signal product development across ADI. Requires programming skills and circuit …
Bangalore, Karnataka, IndiaOn-siteFull-timeActiveMixed Signal Design Verification Engineer
IntelCentral Engineering Group (CEG) at Intel builds scalable engineering solutions across product enablement, custom ASIC, and foundry enablement. As a Mixed Signal Design Verification Engineer you will develop verification …
Bangalore,IndiaHybridFull-timeActiveMixed Signal Logic Design Engineer
IntelMemory PHY Group (MPG) within Intel’s Central Engineering Group builds high‑speed, low‑power DDRPHY IPs. The role designs, verifies, and optimizes mixed‑signal logic, automates front‑end flows, and drives architecture …
Bangalore,IndiaHybridFull-timeActiveMixed Signal Logic Verification Engineer
IntelSenior/Staff Mixed Signal Logic Verification Engineer at Intel responsible for driving complex SoC/ASIC verification. Leads UVM/System Verilog testbench architecture, mixed‑signal IP verification strategy, and …
Bangalore, Karnataka, IndiaHybridFull-timeActive