India jobs / Ppa Optimization / Bengaluru

Ppa Optimization jobs in Bengaluru

Explore 12 current openings. Compare roles, companies, locations, and work options, then open any job to view the full details.

Current openings

Showing 20 jobs
  1. Senior Engineer, PPA Analytics & CAD

    SiFive

    Senior Engineer, PPA Analytics & CAD at SiFive India Private Limited drives the creation of a unified PPA analytics platform, manages flow release cycles, and integrates memory compiler optimization with platform …

    Bengaluru,IndiaFull-time
    Active
  2. TFM and PPA Physical Design Engineer

    Intel

    Engineer the future by developing, debugging, and supporting tools, flows and methodologies covering backend physical design methodologies and flow automation for high performance blocks and full chip level using …

    India, BangaloreHybridFull-time
    Active
  3. TFM and PPA Physical Design Engineer

    Intel

    The ACE CPU team at Intel seeks a TFM and PPA Physical Design Engineer to develop, debug, and support backend physical design tools, flows, and methodologies for high-performance CPUs. Responsibilities include creating …

    Bangalore, IndiaHybridFull-time
    Active
  4. Principal Product Engineer

    Cadence Design Systems

    Digital and Signoff Group (DSG) at Cadence builds advanced chip design software tools. The Principal Product Engineer drives place‑and‑route expertise, PPA benchmarking, and scripting solutions while liaising between …

    Bangalore,IndiaOn-siteFull-time
    Active
  5. TFM and PPA Physical Design Engineer

    Intel

    Engineer future CPUs with ACE CPU team. Develop, debug, support tools, flows, methodologies covering backend physical design, RTL2GDS, high-performance blocks, full chip level. Analyze synthesis, place‑and‑route, floor …

    Bangalore, IndiaHybridFull-time
    Active
  6. Principal Engineer - Memory Compiler Tiler/CAD

    Marvell Software Solutions Israel

    Principal Engineer leading memory compiler, tiling, and CAD initiatives to optimize PPA and drive architectural strategy.

    Bangalore, Karnataka, IndiaOn-siteFull-time
    Active
  7. Senior Staff Physical Design Architect

    SiFive

    Lead the RTL‑to‑GDS flow for high‑speed CPUs, pioneer ML‑driven PPA optimization, and architect scalable build systems on TSMC N3/N2 nodes.

    Bengaluru, Karnataka, IndiaOn-siteFull-time
    Active
  8. Optimizely Developer

    TATA CONSULTANCY SERVICES LTD.

    Technology team at TCS builds digital solutions using Optimizely CMS and Commerce. The role designs, develops, and maintains websites and digital experiences, customizing components, templates, workflows, and content …

    Bengaluru, Karnataka, IndiaOn-siteFull-time
    Active
  9. Sr Principal Product Engineer

    Cadence Design Systems

    Product Engineer at Cadence delivers ASIC design expertise, guiding customers and R&D through RTL‑to‑GDSII flow, timing closure, and PPA optimization at 16 nm and below. Works with Innovus software, debugging and …

    Bangalore, IndiaOn-siteFull-time
    Active
  10. Manager - Design & Optimization

    Elanco

    Elanco, a global leader in animal health, seeks a Manager – Design & Optimization to drive supply chain transformation. The role focuses on advanced modelling, analytics, and optimization to improve cost efficiency, …

    Bangalore, IndiaHybridFull-time
    Active
  11. Staff Engineer, Physical Design Engineering

    Analog Devices

    Analog Devices, a global semiconductor leader, is seeking a Staff Engineer, Physical Design Engineering in Bangalore, India. The role focuses on end‑to‑end physical implementation of complex mixed‑signal SoCs on …

    Bangalore, Aveda Meta, IndiaOn-siteFull-time
    Active
  12. Workforce Optimization

    State Street

    Workforce Optimization team at State Street drives global workforce reduction processes, ensuring compliance and efficiency across regions. The Senior Associate supports process standardization, governance, and …

    Bangalore,IndiaOn-siteFull-time
    Active
  13. Principal Design Engineer

    Cadence Design Systems

    PCIe Design Team at Cadence builds next‑generation high‑speed interface IPs. The Principal Design Engineer leads design, PPA optimization, scripting, and AI‑assisted tooling, debugging with DV teams and ensuring …

    BANGALORE,IndiaOn-siteFull-time
    Active
  14. Finance Optimization Analyst

    Solventum

    Finance Optimization Analyst at Solventum, a healthcare company, will analyze infrastructure costs, forecast trends, evaluate accuracy, provide financial insights for planning, track global cloud usage, explain …

    Bangalore, Karnataka, IndiaHybridFull-time
    Active
  15. Sr Synthesis and Implementation Engineer

    NXP Semiconductors

    AI NPU team at NXP seeks a Sr Synthesis & Front‑End Implementation Engineer to translate RTL designs into optimized gate‑level netlists, ensuring PPA targets for complex IP blocks. The role performs logical and physical …

    Bangalore,IndiaOn-siteFull-time
    Active
  16. Lead Fulfilment Optimization Manager

    Target

    Lead Operations Research on Target’s Fulfillment Optimization Analytics team, shaping last mile strategy, driving guest value, and improving profitability. Identify growth opportunities, build scalable optimization, …

    Bangalore, Karnataka, IndiaOn-siteFull-time
    Active
  17. CPU RTL Design Engineer III

    Google

    Platforms and Devices team develops custom silicon that powers Google’s consumer products. As a CPU RTL Design Engineer you will implement and optimize RISC‑V core features, work on pipeline microarchitecture, and …

    Bengaluru,Karnataka,IndiaOn-siteFull-time
    Active
  18. Compiler Optimization Engineer

    Nvidia

    NVIDIA re-targetable GPU compiler backend team builds compilers that unlock GPU potential for graphics, deep learning, HPC, and self-driving cars. The role optimizes register allocation, instruction scheduling, and loop …

    India, BengaluruFull-time
    Active
  19. Compiler Optimization Engineer

    Nvidia

    Join NVIDIA’s compiler organization as a Compiler Optimization Engineer focused on LLVM. Drive performance improvements for GPUs across graphics, deep learning, scientific computing, and autonomous driving workloads. …

    Bengaluru, IndiaOn-siteFull-time
    Active
  20. Principal Application Engineer

    Cadence Design Systems

    Cadence seeks a Principal Application Engineer to lead RTL-to-GDSII metrics, drive methodology discussions, partner with sales, advocate new tech, create out‑of‑the‑box solutions, deploy ML for productivity, isolate …

    Bangalore, Karnataka, IndiaOn-siteFull-time
    Active