Serdes jobs

Senior SerDes Analog Design

Senior analog designer focused on 100Gbps+ SerDes wireline technologies, responsible for end-to-end circuit and architecture development—from specification through silicon evaluation to market launch—while collaborating …

Senior Staff Analog Circuit Design Engineer

Senior Staff Analog Circuit Design Engineer – SerDes at Intel responsible for designing, implementing, and validating advanced analog and mixed‑signal circuits for 112G/224G SerDes. Leads definition, design, and …

SerDes PHY Analog Design Engineer

BDC SerDes Mixed-Signal Design team at Qualcomm develops high‑speed SerDes PHYs for next‑generation SoCs, focusing on low‑power, high‑performance analog solutions. The engineer will own analog circuit design of TX/RX …

SerDes Circuit Design Engineer

Analog Circuit Design Engineer at Intel’s Central Engineering Group, building high‑speed SerDes circuits for next‑generation Ethernet and memory interface PHYs. Designs, simulates, and optimizes analog blocks, …

Senior Staff Engineer - Design Verification- SerDes/ PHY/AMS / Mixed‑Signal

Central Engineering AMS IP at Marvell India builds high‑quality analog and mixed‑signal IP and verification for advanced SoCs. The Senior Staff Engineer drives block‑ and subsystem‑level verification of AMS and …

Senior Engineer, Linux BSP and Driver Development

L&T Semiconductor Technologies, the hardware and software backbone for L&T's digital infrastructure, seeks a Senior Engineer to lead Linux BSP and driver development for Ethernet, SerDes, and PCIe. The role designs and …

Principal Engineer

Central Engineering AMS‑IP at Marvell delivers high‑quality analog and mixed‑signal IP and verification for advanced SoCs. The Principal Engineer leads end‑to‑end verification strategy for high‑speed SerDes and AMS IPs …

Staff Design Verification Engineer- SerDes / AMS / mixed‑signal IPs

Central Engineering AMS IP delivers high quality analog and mixed signal IP and verification for Marvell’s advanced IPs, SoCs and platforms. The role executes and owns verification activities for SerDes / AMS / …

Design Engineer

Cadence Design Systems’ SERDES team in Bangalore builds high‑speed interface IP for PCIe, CXL, UCIe, and Ethernet. The role leads pre‑silicon emulation, hardware board design, firmware development, and system‑level …

Software Applications Engineer

Marvell seeks a Software Applications Engineer to resolve customer hardware and software issues, focusing on high‑speed Ethernet Serdes and Layer 1 interfaces. The role involves designing and developing application …

Principal Analog Circuit Design Engineer

Intel is seeking a Principal Analog Circuit Design Engineer to spearhead the creation and validation of cutting‑edge analog circuits for 112G and 224G SerDes. The role demands deep expertise in PLL, CDR, CTLE, DFE, ADC, …

Sr. Verification Engineer

Broadcom seeks a Senior Verification Engineer for the High Speed Serdes Team in Bangalore. The role focuses on planning, executing, and closing RTL verification for Ethernet and SerDes interfaces using UVM methodology. …

Senior Staff Engineer - Design Verification

Sr Principal Design Engineer

Analog and Mixed Signal design team at Cadence focuses on high‑speed D2D and SERDES product development. The Sr Principal Design Engineer leads design of CMOS SERDES and high‑speed I/O IC blocks from concept through …

Design Engineering Architect

Analog and Mixed Signal Design Team at Cadence builds high‑speed D2D and SERDES ICs for next‑gen nodes. The Design Engineering Architect leads design of analog/mixed‑signal blocks, collaborates with layout engineers, …

Analog Layout Senior Staff Engineer

Analog Mixed Signal (AMS) team at Marvell’s Central Engineering drives high‑speed SerDes IPs for AI, cloud, and networking. The Senior Staff Engineer leads full‑custom layout, verification, and automation for FinFET …

Lead Design Engineer

Cadence Design Systems' High Speed SERDES team builds cutting‑edge silicon and hardware solutions for PCIe, CXL, UCIe, and Ethernet. The Lead Design Engineer drives pre‑ and post‑silicon prototyping, validation, and …

Senior Verification Engineer

Broadcom seeks a Senior Verification Engineer to join its High Speed Serdes Team within the Physical Layer Products Group. The role focuses on planning, executing, and closing RTL verification for Ethernet and SerDes …

Principal AMS Verification Engineer

Principal AMS Verification Engineer at NXP India leads the end‑to‑end verification strategy for high‑speed SerDes IPs, architecting UVM/UVM‑AMS environments and driving mixed‑signal validation across IP, subsystem, and …