Synthesis jobs in Bengaluru

Senior Staff Engineer, NPU/AI Processor Synthesis

Hardware Engineering – NPU Synthesis team at Qualcomm drives synthesis and timing closure for Neural Processing Unit IP in cutting‑edge SoCs. The Senior Staff Engineer leads RTL‑to‑gate synthesis, develops scripts, and …

Sr Synthesis and Front

AI NPU team at NXP seeks a Sr Synthesis & Front-End Implementation Engineer to translate RTL designs into optimized gate-level netlists, ensuring PPA targets for complex IP blocks. The role drives logical and physical …

Design Implementation - Synthesis Engineer, Lead

Hardware Engineering at Qualcomm focuses on creating cutting‑edge electronic systems for next‑generation devices. The Lead Synthesis Engineer plans, designs, optimizes and verifies digital/analog/RF hardware, driving …

Staff Synthesis & STA Engineer

Staff Synthesis & STA Engineer at Analog Devices leads synthesis and static timing analysis for high‑performance ICs with complex digital and analog interfaces. The role drives methodology improvements, guides small …

Staff Engineer, NPU/AI Processor Synthesis

Hardware Engineering team at Qualcomm focuses on cutting-edge SoC designs. The Staff Engineer leads RTL-to-gate synthesis and timing closure for NPU IP, optimizing performance, power, and area while collaborating with …

STA Synthesis Engineer

Position Summary: Samsung Semiconductor India Research (SSIR) seeks a STA Synthesis Engineer to own timing constraints at image sensor full chip and subsystem levels, develop and validate constraints using EDA tools, …

Design Implementation - Power Synthesis Principal Engineer

Hardware Engineering team at Qualcomm focuses on advanced power synthesis for cutting‑edge silicon. The Principal Engineer leads synthesis flow development using Synopsys DC, Cadence Genus, and multi‑voltage UPF …

Rtl Synthesis Methodology Lead

Hardware Engineering team at Qualcomm drives next‑generation RTL‑to‑Gate implementation for Snapdragon SoCs. The RTL Synthesis Methodology Lead defines, develops and deploys the global synthesis reference flow, …

NPU/AI Processor Synthesis Lead

Sr Synthesis and Implementation Engineer

AI NPU team at NXP seeks a Sr Synthesis & Front‑End Implementation Engineer to translate RTL designs into optimized gate‑level netlists, ensuring PPA targets for complex IP blocks. The role performs logical and physical …

NPU/AI Processor Synthesis Staff, Sr Staff, Technical Lead

Hardware Engineering – ASIC Synthesis team at Qualcomm focuses on delivering high‑performance, low‑power NPU and AI processor IP for cutting‑edge SoCs. The lead drives RTL‑to‑gate synthesis, timing closure, and PPA …

Display Synthesis Senior/Lead/Staff

Qualcomm Hardware Engineering team drives next‑generation display subsystems for smarter, connected experiences. The senior/lead staff engineer leads a high‑performing group to plan, design, optimize and verify physical …

Senior Staff Engineer, Design Implementation - Synthesis

Qualcomm Hardware Engineering team drives the design and implementation of cutting‑edge electronic systems for next‑generation products. The Senior Staff Engineer leads synthesis development, optimizes low‑power …

NPU AI Processor Synthesis Senior Lead

Hardware Engineering team at Qualcomm designs and brings to market cutting‑edge NPU AI processors. The Senior Lead plans, designs, optimizes, verifies and tests electronic systems, drives yield improvements, and leads …

NPU/AI Processor Synthesis - Principal Engineer/Manager

Hardware Engineering team at Qualcomm focuses on delivering cutting‑edge NPU and AI processor IP for advanced SoCs. The Principal Engineer leads RTL‑to‑gate synthesis, timing closure and PPA optimization for NPU …

FPGA SW Validation Engineer

Validates and researches Quartus Synthesis & Compiler optimizations, Partial Reconfiguration flow, and debugging features like SignalTap using Quartus Design Software and Altera FPGA hardware. Creates device‑specific …

Lead Hardware Engineer

Lead Hardware Engineer at Cadence Design Systems. Responsible for synthesis, PnR, SOC design, methodology improvement, floor planning, placement, routing, low power synthesis, scripting, verification. Works with RTL, …

Senior Lead RTL Design Engineer

CSI team at Qualcomm focuses on ASIC design flow from RTL to synthesis. The Senior Lead RTL Design Engineer develops and maintains high‑speed RTL for multiple logic blocks, runs linting, CDC and synthesis tools, and …

Physical Design Engineer

Central Engineering Group (CEG) at Intel builds scalable engineering solutions for custom ASIC and foundry enablement. The Physical Design Engineer implements custom IP and SoC designs from RTL to GDS, handling …