Systemverilog jobs
Explore 302 current openings. Compare roles, companies, locations, and work options, then open any job to view the full details.
Current openings
Showing 20 jobsASIC Verification Engineer
Hewlett Packard EnterpriseASIC Verification Engineer at HPE's Aruba, responsible for designing and implementing block-level verification environments using SystemVerilog and UVM. Lead verification of large ASIC blocks, analyze coverage, and sign …
Kolkata, West Bengal, IndiaOn-siteFull-timeActiveMTS
Micron TechnologyMicron’s Verification team builds scalable SystemVerilog/UVM environments to validate high‑speed memory designs. The engineer owns verification strategy, drives coverage closure, and mentors peers while ensuring …
Bengaluru,IndiaOn-siteFull-timeActiveEngineer Design Verification Engineer
Analog DevicesEngineer Design Verification Engineer at Analog Devices focuses on planning, strategizing, and executing verification plans for block and full-chip designs using SystemVerilog, UVM, and formal methods. Responsibilities …
Bangalore, Nova, IndiaOn-siteFull-timeActiveDesign Verification Staff
QualcommVerification & Validation team at Qualcomm designs and validates ARM and DSP based SoCs. The role leads silicon validation, creates test environments using SystemVerilog/UVM, and scripts automation in Python or Perl. …
Chennai,Tamil Nadu,IndiaFull-timeActiveVerification Engineer, Digital IP
NXP SemiconductorsDigital IP Verification team at NXP Semiconductors verifies complex IPs such as graphics pipelines, memory subsystems, and interconnects. The engineer develops and executes verification plans, builds SystemVerilog/UVM …
Bangalore,IN,IndiaOn-siteFull-timeActiveDesign Verification Engineer – CPU Verification
GLOBALFOUNDRIESGlobalFoundries, a leading semiconductor foundry, seeks a Design Verification Engineer – CPU Verification to join its CPU verification team in Bangalore. The role focuses on functional verification of CPU cores, …
Bangalore, Karnataka, IndiaOn-siteFull-timeActiveDesign Verification Engineer – CPU Verification
GLOBALFOUNDRIESGlobalFoundries seeks a Design Verification Engineer with 4+ years experience to join CPU verification team. Responsibilities include functional verification of CPU cores, coherency, cache subsystems, developing …
Bengaluru, Karnataka, IndiaOn-siteFull-timeActiveSenior IP Verification Engineer, IOMMU-N
SiFiveVerification Team at SiFive develops robust verification environments for RISC‑V IP. The Senior IP Verification Engineer designs SystemVerilog/UVM testbenches, creates test plans, and drives coverage closure for the …
Bengaluru, Karnataka, IndiaOn-siteFull-timeActiveFunctional Verification Engineer
AccentureVerification Team at Accenture develops robust testbenches to ensure functional correctness of digital designs. The engineer creates constrained-random, directed, and coverage-driven tests using SystemVerilog and UVM, …
Bengaluru, IndiaOn-siteFull-timeActiveHardware Verification Engineer
BayasystemsBayasystems, a Series B startup focused on chiplet-era computing, seeks a seasoned Hardware Verification Engineer in Bengaluru. The role involves designing test plans for configurable interconnect IPs, writing …
Bengaluru, Karnataka, IndiaOn-siteFull-timeActiveLead Solutions Engineer
Cadence Design SystemsLead Solutions Engineer at Cadence Design Systems will design and implement verification strategies for SOCs. Responsibilities include reviewing design specifications, creating test plans, developing constrained random …
AHMEDABAD, IndiaOn-siteFull-timeActiveSenior Engineer
Microchip TechnologyDesign Engineering team at Microchip Technology builds full-chip SoC architectures. The role drives RTL design and verification of complex SoC and full-chip designs, leveraging Verilog/SystemVerilog and UVM …
Chennai,IndiaOn-siteFull-timeActivePrincipal Product Validation Engineer
Cadence Design SystemsLead validation of complex digital systems at Cadence. Drive HDL simulation/emulation, debug with EDA tools, automate processes, design verification environments, and support SoC verification using SystemVerilog, C++, …
NOIDA, IndiaOn-siteFull-timeActivePrincipal Design Verification Engineer
NXP SemiconductorsPrincipal Design Verification Engineer leads verification of complex ASIC IPs and subsystems for NXP's Digital Engineering group. Responsibilities include designing SystemVerilog/UVM environments, developing test …
Pune, IndiaOn-siteFull-timeActiveDigital Design Engineer
NXP SemiconductorsDigital Design Engineer responsible for defining and implementing digital functions across IPs, subsystems, and ICs. Designs, verifies, and evaluates digital logic using Verilog/SystemVerilog, ASIC front‑end flows, and …
Pune, IndiaOn-siteFull-timeActiveStaff Design Verification Engineer
1010 Analog Devices Inc.Analog Devices seeks a Staff Design Verification Engineer to lead verification of next-gen GMSL products. Responsibilities include ASIC and subsystem verification, test plan development, UVM/SystemVerilog methodology, …
Bangalore, IndiaOn-siteFull-timeActiveCPU Verification Engineer
NvidiaNVIDIA’s CPU/SoC Verification team builds and verifies ARM‑based CPUs for AI workloads. The engineer designs UVM/SystemVerilog testbenches, collaborates with architecture teams, and debugs RTL and system‑level issues. …
Bengaluru,INHybridFull-timeActiveAnalog Mixed-Signal Verification Engineer
GLOBALFOUNDRIESGlobalFoundries seeks a Mixed‑Signal Verification Engineer to validate analog and mixed‑signal IP using Verilog‑A/AMS, SystemVerilog, Spectre, Xcelium, AMS Designer. Responsibilities include building testbenches, …
Bengaluru, Karnataka, IndiaOn-siteFull-timeActiveSenior Engineer
Microchip TechnologyVerification engineer for block level verification at Microchip Technology. Develop test plans, environments using SystemVerilog and UVM, integrate with RTL, create test cases, launch regressions, generate and analyze …
Chennai,IndiaOn-siteFull-timeActiveSenior Engineer
Arrow ElectronicsLead SOC/IP block verification using SystemVerilog/UVM. Design test plans, testbench components, interface agents, scoreboards. Execute 1–2 verification projects, debug RTL and testbench issues, close coverage and bug …
Bangalore, IndiaOn-siteFull-timeActive