Ddr jobs
Explore 33 current openings. Compare roles, companies, locations, and work options, then open any job to view the full details.
Current openings
Showing 20 jobsDDR Interface Evaluation Leader
Renesas ElectronicsSenior leader overseeing DDR interface evaluation for Renesas automotive SoCs. Drives silicon and board‑level testing, margin analysis, and stress validation to ensure reliability of LPDDR4X/5/5X/6, DDR PHY, and …
IndiaOn-siteFull-timeActiveAH HYD DDR & PO Associate Operations Processor
Wells FargoAssociate Operations Processor at Wells Fargo in Hyderabad. Handles routine clerical tasks such as logging, batching, and distributing work, filing, photocopying, answering phones, and managing incoming/outgoing mail. …
Hyderabad,IndiaFull-timeActivePrincipal Design Engineer
Cadence Design SystemsCadence’s DDR Subsystem Verification team builds and verifies high‑performance memory IP for global customers. The Principal Design Engineer leads functional verification of DDR, LPDDR, and HBM controllers, develops UVM …
Bangalore,IndiaOn-siteFull-timeActiveSenior DDR & Execution Validation Engineer
GraphcoreMemory Validation team at Graphcore validates DDR and HBM memory subsystems for next‑gen AI compute platforms. The Senior Engineer leads bring‑up, functional, stress and performance validation, develops Python …
Bengaluru, IndiaOn-siteFull-timeActiveStaff Engineer , Systems Design
Micron TechnologyMicron Technology seeks a Staff Engineer in Systems Design to lead DDR/LPDDR performance and power optimization. The role requires deep expertise in DDR/LPDDR architecture, JEDEC specifications, and embedded systems, …
Hyderabad - Phoenix Aquila, IndiaOn-siteFull-timeActiveDDR & HBM Validation Engineer
GraphcoreMemory Validation team at Graphcore validates advanced memory subsystems for next‑generation AI compute platforms. The engineer executes DDR and HBM bring‑up, validation, characterization and debug, develops Python …
Bengaluru,IndiaOn-siteActiveSr Principal Design Engineer
Cadence Design SystemsRTL Design Engineer for DDR Memory Controller IP development team. Design and support RTL of DDR Memory Controller solution. Support DDR4/LPDDR4 protocols. Work with existing RTL, add new features, ensure clean …
NOIDA, IndiaOn-siteFull-timeActiveSenior Engineer I
Microchip TechnologyMicrochip Technology seeks a Senior Engineer I in Software Design to develop EDA software cores and FPGA IP block configurations. The role involves scripting in Tcl/Perl/Python, generating Verilog netlists, creating UI …
Hyderabad, Telangana, IndiaOn-siteFull-timeActiveStaff DDR and HBM Validation Engineer
GraphcoreMemory Validation team at Graphcore ensures robust memory subsystems for next‑generation AI compute platforms. The Staff Validation Engineer leads DDR and HBM bring‑up, validation, characterization and debug, developing …
Bengaluru,Karnataka,IndiaOn-siteFull-timeActiveSr Staff Manager DDR/HBM
Marvell Software Solutions IsraelMarvell Data Centre Engineering (DCE) – Compute & Storage (CCS) BU builds high‑performance ASICs for carrier, cloud, and automotive markets. As Sr Staff Manager DDR/HBM, you mentor engineers, define memory subsystem …
Bangalore,IndiaFull-timeActiveDesign Verification Engineer - Nand, DDR and PCIe
Micron TechnologyMicron Technology seeks a Design Verification Engineer specializing in NAND, DDR, and PCIe subsystems. The role requires deep expertise in UVM-based SystemVerilog testbenches, block‑level and SoC test planning, and …
Hyderabad, IndiaOn-siteFull-timeActiveSenior VLSI Design Engineer, High Speed DDR IO
SanDiskVLSI Engineering team at SanDisk designs high‑speed DDR IO solutions for next‑generation memory. The Senior VLSI Design Engineer develops high‑speed IO blocks, performs power‑bus analysis and timing closure, and …
Bangalore,IndiaOn-siteFull-timeActiveLead Design Engineer
Cadence Design SystemsCadence seeks a Lead Design Engineer to create and verify DDR IO analog layouts, mentor a small team, and collaborate with design engineers to deliver high‑quality IP on 28nm and below nodes.
Bangalore, IndiaOn-siteFull-timeActiveSenior Staff Engineer, DDR Design Verification
QualcommInfra IP team at Qualcomm focuses on verification of LPDDR/DDR IPs and subsystems for next‑gen mobile platforms. The Senior Staff Engineer designs and builds DV infrastructure, creates test plans, writes …
Hyderabad, Telangana, IndiaOn-siteFull-timeActiveDDR Pre
IntelIntel Central Engineering Group (CEG) builds scalable engineering solutions across product enablement, custom ASIC, and foundry enablement. The DDR Pre‑Silicon Verification Architect develops IP verification plans, test …
Bangalore,IndiaHybridFull-timeActiveSenior Staff Design Verification Engineer, DDR PHY
QualcommHardware Engineering at Qualcomm focuses on designing and verifying cutting-edge silicon components for next‑generation mobile devices. The Senior Staff Design Verification Engineer leads the creation of DV test …
Bangalore,Karnataka,IndiaFull-timeActiveStaff Engineer, VLSI Design Engineering (IO Design, High Speed DDR)
SanDiskVLSI Engineering team at SanDisk designs high‑speed DDR IO solutions for next‑generation memory. The Staff Engineer will create and verify high‑speed IO blocks, perform power‑bus analysis and timing closure, and …
Bangalore, Karnataka, IndiaOn-siteFull-timeActiveLead Design Engineer
Cadence Design SystemsLead Design Engineer with 4+ years in design verification, specializing in SV/UVM, functional verification fundamentals, environment planning, test plan generation, and SystemVerilog coding. Experienced in verifying …
BANGALORE, IndiaOn-siteFull-timeActiveSenior Hardware Program Manager, DDR Core Subsystem
QualcommEngineering Services Group – Program Management at Qualcomm drives the development and delivery of DDR core subsystem projects. The Senior Hardware Program Manager leads multiple medium‑complexity programs, creating and …
Bangalore,Karnataka,IndiaOn-siteFull-timeActiveSenior Engineer
Arrow ElectronicsLead verification projects, mentor team, manage client interactions. Guide team on UVM SV test-benches, block/sub-system/SOC test plans. Define PCIe, NVMe, NAND, DDR, CPU subsystem verification flows and metrics.
Bangalore, IndiaOn-siteFull-timeActive