Lvs jobs
Explore 25 current openings. Compare roles, companies, locations, and work options, then open any job to view the full details.
Current openings
Showing 20 jobsSr Principal Product Validation Engineer
Cadence Design SystemsAs PV engineer, this person will be responsible for product validation [quality engineering] with following activities: Develop accuracy test cases for DRC/LVS/FILL rules based on foundry decks, TSMC/Samsung…etc. …
BANGALORE, IndiaOn-siteFull-timeActiveStaff Engineer HIG HBM Layout
Micron TechnologyMicron Technology seeks a Layout Design Engineer for its HBM Team in Hyderabad, India. The role focuses on designing and developing critical analog, mixed-signal, and custom digital blocks, performing layout …
Hyderabad, Telangana, IndiaOn-siteFull-timeActiveSenior Engineer, DPG IP DEV Layout
Micron TechnologyMicron Technology seeks a Senior Engineer, DPG IP DEV Layout in Bengaluru. Responsible for analog, mixed-signal, custom digital block layout design and full-chip integration. Perform LVS/DRC/antenna verification, …
Bengaluru, IndiaOn-siteFull-timeActiveSTAFF Engineer
Micron TechnologyResponsible for layout design and verification of analog, mixed‑signal, and custom digital blocks, including LVS, DRC, antenna, and EM checks. Lead on‑time delivery, mentor junior team members, and automate layout tasks …
Bengaluru,IndiaOn-siteFull-timeActiveLead PD Engineer
NXP SemiconductorsDigital Physical Design Engineer responsible for RTL synthesis to GDS implementation, floor planning, placement, CTS, routing, STA, DRC/LVS/EMIR verification, power integrity, DFT, automation scripts, and continuous …
Bangalore, IndiaOn-siteFull-timeActiveSR ENGINEER, HIG HBM LAYOUT
Micron TechnologyHBM Team at Micron Technology designs high‑bandwidth memory for AI and HPC. The role builds and verifies analog, mixed‑signal, and custom digital block layouts, ensuring LVS/DRC compliance and on‑time delivery. Work is …
Hyderabad,IndiaOn-siteFull-timeActiveAnalog Layout Design Engineer
IntelAnalog Layout Design Engineer at Intel’s Central Engineering Group in Bangalore. The role builds custom analog and mixed‑signal layout for SoC IP, executing Virtuoso designs, DRC/LVS verification, and ECO sign‑off under …
Bangalore,IndiaHybridContractActiveSR ENGINEER, HIG HBM LAYOUT
Micron TechnologyHBM Team at Micron Technology in Hyderabad, India focuses on designing high‑bandwidth memory for AI and HPC. The role involves creating and verifying analog, mixed‑signal, and custom digital block layouts, performing …
Hyderabad,IndiaFull-timeActiveSR ENGINEER, HIG HBM LAYOUT
Micron TechnologyMicron Technology’s HBM Team in Hyderabad, India builds high‑bandwidth memory for AI and HPC. The Layout Design Engineer designs and verifies critical analog, mixed‑signal, and custom digital blocks, performs …
Hyderabad,IndiaOn-siteFull-timeActiveR&D Engineer
BroadcomTLR team (top-level-route) at Broadcom focuses on advanced place and route, CTS, and physical verification for chip finishing and tapeout. The R&D Engineer develops and runs routing, congestion analysis, DRC/LVS checks, …
Bangalore,IndiaOn-siteFull-timeActiveLead Physical Design Engineer
NXP SemiconductorsJob Summary: Digital Physical Design Engineer responsible for RTL synthesis to GDS implementation, floor planning, placement, CTS, routing, STA, DRC/LVS/EMIR, ECO, verification, optimization, and continuous improvement. …
Bangalore, IndiaOn-siteFull-timeActiveEngineer
Micron TechnologyDPG-IPDEV Team at Micron Technology designs world-class analog and mixed-signal IPs for DRAM chips. The Layout Design Engineer creates and verifies block‑level and full‑chip layouts, performs LVS/DRC checks, and …
Hyderabad,IN,IndiaOn-siteFull-timeActiveSenior Mask Design Engineer
SanDiskMask Design Engineering team at SanDisk creates and optimizes mask layouts for analog, digital, and mixed-signal ICs. The Senior Mask Design Engineer independently delivers high‑quality layout designs, performs DRC/LVS …
Bangalore, Karnataka, IndiaOn-siteFull-timeActiveSenior layout Engineer
Micron TechnologyDPG Layout team at Micron Technology builds and verifies analog, mixed‑signal, and custom digital blocks for memory products. The role owns block‑level layout execution, performs DRC/LVS/antenna checks, and uses AI …
Hyderabad,IndiaOn-siteFull-timeActiveStaff Engineer, IPdev Layout
Micron TechnologyDesign and develop critical analog, mixed‑signal, custom digital block and full‑chip layouts for Micron’s DRAM IPs. Perform layout verification (LVS/DRC/antenna), ensure quality, and deliver block‑level layouts on …
Hyderabad,IndiaOn-siteFull-timeActiveStaff Engineer, Physical Design Engineering
1010 Analog Devices Inc.Staff Engineer responsible for end-to-end Netlist-to-GDS Physical Design, including Place‑and‑Route, Extraction, STA, Timing/SI/Power/EM/IR analysis, and LVS/DRC verification. Leads automation via Python/Perl/Shell/TCL …
Bangalore, IndiaOn-siteFull-timeActiveSTAFF ENG-HIG-HBM
Micron TechnologyMicron Memory team at Hyderabad – Phoenix Aquila, India leads the design and verification of high‑bandwidth memory layouts. The role drives complex analog, mixed‑signal, and digital block design, performs …
Hyderabad,IndiaOn-siteFull-timeActiveStaff Engineer, Scribe Design Non-Array
Micron TechnologyMicron Technology seeks a Staff Engineer for the Scribe Design Non‑Array team in Hyderabad. The role focuses on designing, laying out, and verifying CMOS test structures across multiple process nodes, ensuring design …
Hyderabad, IndiaOn-siteFull-timeActiveSR ENGINEER, HIG HBM LAYOUT
Micron TechnologyMicron’s HBM Team in Hyderabad builds high‑bandwidth memory for AI and HPC. The role designs and verifies analog, mixed‑signal, and custom digital blocks, ensuring LVS/DRC compliance and on‑time delivery. It …
Hyderabad, IndiaOn-siteFull-timeActiveR&D Engineer
BroadcomTLR team at Broadcom focuses on top-level routing and physical verification for advanced chip designs. The R&D Engineer conducts place-and-route, CTS, congestion analysis, runs DRC/LVS checks, scripts in Perl/TCL, and …
Bangalore,IndiaOn-siteFull-timeActive